IBM Claims First Sub-1 Nanometer Chip Process
*IBM says its nanostack transistors mark the first chip technology built below the one-nanometer scale.*
IBM announced it has produced what it calls the world’s first sub-1 nanometer chip technology. The work centers on nanostack transistors that the company states could raise either performance or energy efficiency.
The claim
Two reports published on 25 June 2026 describe the same assertion. Ars Technica and Engadget both attribute the statement directly to IBM without additional technical data or independent verification.
Prior state
Current leading-edge processes sit at roughly 2 nanometers or slightly above. IBM’s announcement, if accurate, would place the new approach at least one full node smaller.
Technical detail supplied
The only concrete element released is the name “nanostack transistors.” No gate pitch, channel material, or power numbers appear in the coverage. The sources note only that the transistors “could boost chip performance or energy efficiency.”
Reactions
No third-party comments or competing claims have surfaced in the supplied material.
Why it matters
A verified sub-1 nm process would extend the physical limits of silicon scaling, yet the absence of measured results leaves the practical impact unknown. Engineers and foundry customers will wait for silicon data before adjusting road maps.
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