IBM Claims First Sub-1 Nanometer Chip Technology
*IBM says its nanostack transistors mark the first chip process below one nanometer and could improve either speed or power use.*
IBM announced it has created the world’s first sub-1 nanometer chip technology. The company calls the approach nanostack transistors and states the design can raise performance or energy efficiency.
Three outlets reported the claim on the same day. Ars Technica, Engadget, and IBM’s own newsroom each carried the announcement without additional technical specifications or timelines for production.
The sources contain no performance numbers, yield data, or comparisons to existing 2-nanometer or 3-nanometer nodes. They also report no customer commitments or foundry plans.
Reactions
No third-party analysis or competing claims appear in the supplied sources. Hacker News hosted discussion of the announcement, but the coverage itself offers only the original IBM statement.
Why it matters
Chip makers have long treated each reduction in feature size as a route to more transistors per die or lower power per switch. A credible sub-1-nanometer process would extend that path, yet the absence of measured results leaves open whether the technique solves the usual problems of leakage, heat, and manufacturability at these scales. Engineers tracking roadmaps will watch for follow-up data rather than treat the claim as settled.
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Sources:
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"excerpt": "IBM says its nanostack transistors deliver the first sub-1 nanometer chip process and may raise performance or efficiency.",
"suggestedSection": "hardware",
"suggestedTags": ["ibm", "semiconductors", "nanotechnology"],
"imagePrompt": "Layered silicon wafers with fine vertical stacks rest on a matte workbench under diffused side lighting. Abstract geometric ridges suggest transistor channels without any recognizable device or text, muted color palette, cinematic lighting, 16:9"
}
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